Online Course Catalog
ECE 462 D - Logic Synthesis
Fall 2020
| Title | Section | CRN | Type | Hours | Times | Days | Location | Instructor |
|---|---|---|---|---|---|---|---|---|
| Logic Synthesis | D | 56118 | ONL | 3 | 1230 - 1350 | T R | Shobha Vasudevan |
Course Description
Unate function theory, unate recursive paradigm, synthesis of two-level logic, synthesis of incompletely specified combinational logic, multi-level logic synthesis, binary decision diagrams, finite state machine synthesis, automatic test pattern generation and design for test, equivalence checking and reachability analysis of finite machines, and technology mapping are covered in this course.
Credit Hours
3 hours
Subject Area
- Electrical and Computer Engineering