11/13/2009
Computer science professor Josep Torrellas is the author of a a cover feature in the November 2009 issue of IEEE Computer magazine, published by the IEEE Computer Society. Torrellas’ feature on “Architectures for Extreme-Scale Computing” is the lead article in the issue devoted to extreme-scale computing.
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Computer science professor Josep Torrellas is the author of a a cover feature in the November 2009 issue of IEEE Computer magazine, published by the IEEE Computer Society. Torrellas’ feature on “Architectures for Extreme-Scale Computing” is the lead article in the issue devoted to extreme-scale computing.
In the article, Torrellas details the new architecture challenges in extreme-scale computing, including the non-trivial challenge of generating 1000x more computing power as current architectures, while maintaining the same the same power consumption and physical footprint.
Extreme-scale computing is the next step in architecture, just as petascale computing has finally become a reality. The Blue Waters system, currently being built at the University of Illinois, will be the first computer to provide sustained petaflops performance (that’s 10 quadrillion calculations per second!) for a broad range of scientific and engineering applications when it comes online in 2011.
The goal of extreme-scale computing is to top that performance by three orders of magnitude.
“Clearly, attaining such a general-purpose [performance] would revolutionize computing,” says Torrellas. “Conceiving and building such systems, however, poses technical challenges at all levels of the computing stack, including circuits, architecture, software systems, and applications. The sheer size of the challenges and opportunities of attaining such systems by the end of the next decade should act as a strong motivator for researchers.”
Torrellas discusses the daunting architectural challenges presented by these new requirements, including power and energy efficiency, concurrency and locality, resiliency, and programmability, and presents his vision for how these challenges can be overcome.
Torrellas is an expert on multiprocessor computer architecture, parallel computing, speculative multithreading, and software and machine reliability. He has been involved in the Stanford DASH and the Illinois Cedar multiprocessor projects, lead the Illinois Aggressive COMA multiprocessor, and currently leads the Bulk Multicore architecture design. The Bulk Multicore is a revolutionary multiprocessor architecture designed for programmability.
He currently co-ordinates the Illinois OpenSPARC Center of Excellence and is a researcher for the Universal Parallel Computing Research Center at Illinois, a Microsoft and Intel funded center focusing on making parallel programming synonymous with programming.
Download the complete IEEE Computer article at: www.computer.org/portal/web/csdl/doi/10.1109/MC.2009.341
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Contact: Josep Torrellas, Department of Computer Science, 217/244-4148.
Writer: Jennifer La Montagne, associate director of communications, Department of Computer Science, 217/333-4049.
If you have any questions about the College of Engineering, or other story ideas, contact Rick Kubetz, Engineering Communications Office, 217/244-7716, editor.