Van der Waals Materials and Devices for In-Memory Computing—Enabling AI at the Edge
2021 Strategic Research Initiatives
Shaloo Rakheja, Wenjuan Zhu, and Naresh Shanbhag, Electrical and Computer Engineering
Axel Hoffmann, Materials Science and Engineering
The deployment of artificial intelligence (AI) capabilities on Edge devices (wearables, autonomous vehicles, personal biomedical devices, Internet of Things (IoT) devices etc.) has emerged as a priority research direction for the US government due to its broad socio-economic impact in advanced healthcare systems, transportation, resilient energy, and telecommunication networks. However, the energy and latency costs of realizing today’s data-centric AI workloads on conventional compute architectures is made prohibitive due to their reliance on von Neumann architectures.
To alleviate the drawbacks of existing computing systems, we propose a transformative cross-layer solution for designing beyond-von Neumann in-memory computing (IMC) architectures. By leveraging the unique properties of van der Waals (vdW)-based nano-primitives, assisted by the Shannon-inspired statistical model of computation, the proposed in-memory architecture will offer >20x increase in compute density and >20x increase in energy efficiency, compared to state-of-the-art (SOTA) solutions. The research conducted by the inter-disciplinary team at UIUC, comprising Shaloo Rakheja (device theory and simulation), Wenjuan Zhu (vdW and ferroelectric materials synthesis and device fabrication), Axel Hoffmann (spin-orbit torques and magnetization dynamics), and Naresh Shanbhag (circuits and systems for signal processing and machine learning) will establish an overarching materials-to-systems co-design framework for energy- efficient AI architectures for the Edge.
Problem Statement and Goal:
IMC architectures have shown >100x energy savings over digital architectures. However, mainstream IMCs, based on CMOS static random-access memory and resistive random-access memory, have fundamental limits vis-aÌ€-vis their throughput, energy efficiency and/or endurance and are, therefore, ill-suited for AI at the edge. We see new research opportunities for the co-development and coordinated exploration of new materials, devices, and heterogeneous device integration within the context of computational platforms based on IMCs to push the limits of energy efficiency and latency of Edge devices deploying AI applications.
The goal of this research is to achieve breakthrough energy efficiency and performance gains in IMCs by transforming the underlying hardware fabric using area- and energy-efficient nano-primitives, defined as device structures embodying IMC-specific functionality such as bit-level multiply-add. Our focus on nano- primitives, rather than a logic switch, expands the design space of materials and devices research, while also ensuring its utility in the AI space.
Merit and Impact:
Our research addresses the power problem of AI platforms via new approaches that promise unprecedented gains in energy efficiency compared to SOTA approaches and thereby reduce its carbon footprint. Our vertically integrated research plan of co-designing and co-optimizing across the design hierarchy will establish the connection between architecture-level research and research aimed at optimizing individual devices for AI applications of the future. In this process, we hope to discover new knowledge both at the device technology level and applications level, creating significant scientific impact and advancement of domain knowledge. The interdisciplinary expertise of our team and leadership experience will drive the proposed research toward success and attract large-scale funding from the government and industry. The PIs will leverage their existing collaborations with industry leaders and national laboratories to improve university-industry-government coordination and “speed the path from discovery to innovation.”