Leopoldo D. Yau
Intel Fellow and Director of Innovation Technology Modules, Intel Corporation, Hillsboro, Oregon (Retired)
- BS, 1962, Electrical Engineering, University of San Carlos
- MS, 1965, Electrical Engineering, University of Minnesota
- PhD, 1969, Electrical Engineering, University of Illinois at Urbana Champaign
After receiving his doctoral degree from Illinois, Leopoldo D. Yau taught undergraduate and graduate electrical engineering courses at the University of the Philippines and also at Illinois for several years before joining Bell Laboratories in 1973. He was one of the first to realize that the relentless reduction in the size of metal oxide semiconductor (MOS) transistors profoundly affects the physics of the transistor and its electrical characteristics. He conceived and published what became known as the Yau model, a theory that predicts the threshold of short-channel MOS transistors with remarkable accuracy. Today, the theory of short-channel transistors is a fundamental component in the study of electronic device design. Since the 1970s, CAD circuit simulation tools, such as those used routinely by Intel, have incorporated the Yau model.
After joining Intel’s technical staff in 1978, Yau pursued advances in lithography and dielectrics for transistors. His innovations were critical to the success of Intel’s DRAM products and were subsequently extended to Intel’s logic chips, beginning with the 33 MHz 386 processor and the 66 MHz Pentium that revolutionized computer systems. In addition, Yau is the inventor of plastic passivation technology for DRAMs and was the first to introduce dual-frequency, plasma-enhanced chemical vapor deposition to the deposition of intermetal dielectrics. He was named an Intel Fellow in 1986, the highest technical honor Intel bestows on its employees.
Yau has a strong commitment to excellence in education at Illinois. He has stayed connected to faculty and staff and assisted with corporate donations, such as an award of state-of-the-art integrated circuit fabrication equipment, valued at $1.4 million, to the Integrated Circuit Fabrication Laboratory in the Department of Electrical and Computer Engineering.
Current as of 2010.