Computer Architecture for the Software-Minded

Computer Architecture for the Software-minded 

Who Should Attend

The target audience for Computer Architecture for the Software-minded includes Software engineers, hardware engineers, executives that need to make hardware procurement, hardware design, or hardware platform selection decisions.

Course Description

Details of hardware increasingly determine the performance, efficiency, and correctness of software. This course focuses on hardware design and computer architecture for the software-minded. We will focus on hardware implementation details (e.g., caches, forwarding, synchronization, coherence, memory model, etc.) that directly impact software performance and correctness. Subsequently, we discuss best practices in software and compiler design that maximize application performance and efficiency while minimizing chances of incorrect execution. Hands-on exercises will be used to evaluate and internalize the discussed concepts.

Learning Outcomes 

The course Computer Architecture for the Software-minded aims to enable participants to:

• Enhance understanding of fundamental concepts in computer architecture and how they impact application performance and energy efficiency
• Gain confidence in programming for performance, scalability, and efficiency
• Improve ability to evaluate architectural descriptions of even today’s most complex processors

Computer and/or Software Requirements

C/C++, CUDA (optional)

Resources & References 

Course textbook [not required]:                                                                                                                                                                                                                            Patterson & Hennessy. Computer Organization and Design (5th Ed.); Morgan Kaufmann; ISBN: 978-0-12-407726-3

Recommended textbooks:                                                                                                                                                                                                                                           Hennessy & Patterson. Computer Architecture: A Quantitative Approach (5th Ed.); The Morgan Kaufmann, ISBN: 978-0123838728                                  Shen & Lipasti. Modern Processor Design: Fundamentals of Superscalar Processors (1st Ed.); Waveland Press, ISBN: 978-147860783

Sample Course Outline

Fundamental concepts in computer organization focusing on uni-processor architecture

 -pipelining

 -memory hierarchy

 -instruction-level parallelism & dynamic scheduling

-programming for performance

Multi-core processors

 -Coherence / consistency..etc.

-programming for performance and correctness

-GPUs

 -architecture

-programming for performance and correctness

About the Instructor

Rakesh Kumar is an associate professor in the Electrical and Computer Engineering Department at the University of Illinois at Urbana Champaign with research and teaching interests in computer architecture, hardware design, and low power, trustworthy and error resilient computer systems. His research and teaching have been recognized through several best paper awards and best paper award nominations (IEEE MICRO Top Picks, ASPLOS, HPCA, CASES, SELSE, IEEE CAL), Stanley H Pierce Faculty Award, Mahatma Gandhi Pravasi Samman, Ronald W Pratt Faculty Outstanding Teaching Award, ARO Young Investigator Award, Arnold O Beckman Award, and UCSD CSE Best Dissertation Award. He previously served as a Co-Founder and Chief Architect at Hyperion Core, Inc, a microprocessor startup aimed at bringing polymorphous grid processor technology to the market. He often writes about issues at the intersection of technology, policy, and society -- his opinion columns frequently appear in leading newspapers and magazines. His technology and education advocacy has been recognized by a Nelson Mandela Leadership Award. Rakesh has a BS from IIT Kharagpur and a PhD from University of California at San Diego.